Two great conceptual leaps make this design possible. The first is the use of a much lower frequency crystal than normal, such that the 14 stages of division available in a single 74HC4060 used as oscillator and divider, are sufficient to obtain a low enough frequency for the Huff & Puff latch. The second is an innovative way to make one flip flop of the 74HC74 behave as an inverter, which can then be used to create an oscillator.

Usually the Huff & Puff stabiliser requires a latch to store the VFO state at precise intervals. A latch implies the use of a 74HC74 dual D-type flip flop IC. Somehow I had the idea that the spare flip flop in the IC might be configured to behave as an inverter. A study of the 74HC74 datasheet revealed that this is indeed the case: when D, CLK and /MR (clear) inputs are all held low, the signal presented to the /PR (preset) input is inverted and arrives at the Q output. The inverted output /Q remains always at 1 and cannot be used in this application.

To the right, I have inserted the internal logic diagram of a 74HC74 flip flop, from the Fairchild Semiconductor datasheet. On this diagram, I started drawing 1's and 0's at the gate inputs and outputs, based on holding D, CLK and /MR at 0. It was reasonably easy to prove that under these conditions the only thing determining the state of the Q output, is the /PR input, via gates which behave effectively as five inverters in series. Therefore the flip flop as a whole behaves as an inverter! As soon as you have an inverter, you have a possible oscillator. I originally posted my idea to the Huff Puff oscillator forum and John G0UCP verified the design before I had time to build it myself. He made some modifications to my drawn oscillator section, which had been based on a circuit I had used before with a 74LS04 oscillator, in a 30m direct conversion recevier. Thanks are therefore due to John for his oscillator modification, which I have used here.

Here are two pictures of my workbench during development of this project. By the time these photos were taken, it was already becoming a 3-chip combined VFO / Stabiliser and Frequency counter, as you will see in the next section. Note the spaghetti of wires over the "ugly" construction board. The potentiometer towards the rear is for VFO tuning. The 500K potentiometer in the foreground is used to experiment with different integrator settings (time constant). In the background, my Polyphase HF receiver with its homebuilt frequency counter, which is being used here to measure the VFO frequency NOT the receiver's own internal reception frequency.



And finally here is the circuit diagram. This circuit should in fact more accurately be known as a 1.5-chip Huff Puff Stabiliser combined with a 0.5-chip VFO. I use a 10nF decoupling capacitor across each chip's supply (not shown).



I used a KANK3333 inductor like John G0UCP. This allows easy tuning of the tuneable VFO frequency band. For the tuning capacitor, I use an ordinary standard 5mm red LED! This single diode behaves as a varicap and functions as both main tuning, AND the Huff Puff correction. I should refer you to my Ordinary diodes as varicap diodes page for details of an experiment I once did. You'll see that I had much better results with red LED's than green ones, so don't be tempted to substitute.

I have shown a cheap 32.768KHz watch crystal in the diagram but did in fact use a 32.000KHz crystal. These are more rare but produce timing which is suitable for a frequency counter, see next section. In this particular application (VFO + Stabiliser only), either will do fine. With the 74HC4060 Q10 output (pin 15) used, the distance between lock points was 31.25Hz (would be 32Hz with a 32.768KHz crystal).

The use of two 220uF capacitors in the integrator means that at switch on, the integrator voltage is automatically started at 2.5V. Lock therefore occurs within a few seconds of switch on. I found that the additional 22pF capacitor in the right hand leg of the oscillator tank circuit was necessary in order to get coverage of 80m. With the component values shown, the VFO tunes 3.500 to 3.670MHz (170KHz coverage). By removing the 22pF capacitor and unscrewing the KANK3333 inductor core, I was able to get complete coverage of the 40m band and raise the frequency as high as 8MHz by removing the core completely. The stabiliser still worked at this higher frequency. I have not tried to increase it further.

NOTE: I accidentally put the 330K resistor in the wrong leg of the 74HC4060 crystal oscillator circuit (i.e., opposite side to what is shown in the diagram). The oscillator still worked fine, so perhaps that 330K resistor isn't very critical.

The circuit appears to be quite insensitive to the choice of integrator time constant. I was able to use resistor values from 50K to 500K and still obtain reliable locking. A faster, more aggressive integrator (lower resistor) is needed if the drift can be rapid, so that the stabiliser can still correct it quickly. This does impose more frequency ripple on the VFO output. Again, like so many things in life, the choice is a matter of compromise.